/*
 * asm.s contains the low-level code for most hardware faults.
 * page_exception is handled by the mm, so that isn't here. This
 * file also handles (hopefully) fpu-exceptions due to TS-bit, as
 * the fpu must be properly saved/resored. This hasn't been tested.
 */

.globl divide_error,debug,nmi,int3,overflow,bounds,invalid_op
.globl device_not_available,double_fault,coprocessor_segment_overrun
.globl invalid_TSS,segment_not_present,stack_segment
.globl general_protection,coprocessor_error,reserved


error_code:
	xchgl %eax,4(%esp)		# error code <-> %eax
	xchgl %ebx,(%esp)		# &function <-> %ebx
	pushl %ecx
	pushl %edx
	pushl %edi
	pushl %esi
	pushl %ebp
	push %ds
	push %es
	push %fs
	pushl %eax			# error code
	lea 44(%esp),%eax		# offset
	pushl %eax
	movl $0x10,%eax
	mov %ax,%ds
	mov %ax,%es
	mov %ax,%fs
	call *%ebx
	addl $8,%esp
	pop %fs
	pop %es
	pop %ds
	popl %ebp
	popl %esi
	popl %edi
	popl %edx
	popl %ecx
	popl %ebx
	popl %eax
	iret


no_error_code:
; Push Everything
; Pop Everything
; Return
	iret


; int0()
divide_error:


; int1()
debug:
; Jump to C code
	jmp no_error_code	


; int2() or int15()
reserved:
; Jump to C code
	jmp no_error_code

; int3()
break_point:
; Jump to C code
	jmp no_error_code

; int4()
overflow:
; Jump to C code
	jmp no_error_code

; int5()
bounds:
; Jump to C code
	jmp no_error_code

; int6() 
invalid_op:
; Jump to C code
	jmp no_error_code

; int7()
coprocessor_not_avail:
; Jump to C code?
	jmp no_error_code

; int8()
double_fault:
; Jump to C code

; int9()
coprocessor_segment_overrun:
; Jump to C code
	jmp no_error_code


; int10()
invalid_TSS:
; Jump to C code
	jmp error_code

; int11()
segment_not_present:
; Jump to C code
	jmp error_code

; int12()
stack_exception:
; Jump to C code
	jmp error_code

; int13()
general_protection:
	pushl $do_general_protection
	jmp error_code

; int14()
page_fault:
; Jump to C code
	jmp no_error_code

; int16()
coprocessor_error:
; Jump to C code
	jmp no_error_code


; Memory Shit
stack_segment:
	pushl $do_stack_segment
	jmp error_code

